Thin film etching is a critical aspect of many processes for constructing microelectronic structures, such as semiconductor structures. Two conventional techniques are prevalent and each has related disadvantages. Wet chemical etching, or more simply “wet etching”, generally is associated with high selectivity between etchants for the dielectric material to be etched, and the underlying substrate material. The term “high selectivity” is used in reference to relative etch rates of solvents upon solids. For example, desirable wet etchants are available which effectively etch many thin film materials, but which are relatively ineffective at etching common substrate materials; such etchants are deemed highly “selective”, in that they are effective on the thin film to be etched, or etching “target”, and relatively ineffective on the substrate, into which etching is not desired during the pertinent process phase.
While certain wet etchants have the advantage of high selectivity as paired with substrates and target materials, many of these wet etchants also etch at the same rate in all directions of solid material exposure, which is known as “isotropic” etching. Isotropic etching adjacent a structure such as a gate electrode may lead to an undesirable undercutting problem, as is further described below. FIGS. 1A–1C depict an etching scenario illustrative of such an undercutting problem.
Referring to FIG. 1A, a very thin material layer, or “thin film” (103) is depicted, disposed between a masking structure (101) and a substrate layer (100). In this illustration, the masking structure (101) comprises a gate electrode (104) and a masking layer (106), and the thin film (103) comprises a dielectric layer (102). The term “masking structure” is in reference to the substantially impermeability of such structure to applied etching or implantation treatments, such as wet etching, dry etching, or ion implantation. The objective in this illustrative scenario, as in many conventional microelectronic structure processing scenarios associated with similar structures, is to remove the portions of the dielectric layer not directly under the gate electrode, while preserving intact the entire portion of the dielectric layer which lies directly between the gate electrode and the substrate layer. Referring to FIG. 1B, a wet etchant (not shown) having isotropic etching properties has been applied and has started etching the dielectric material. The isotropic nature of the wet etchant produces curvature (108) in the surface of the dielectric layer (102) adjacent the gate electrode (104). Referring to FIG. 1C, the entire thickness of the dielectric layer not immediately adjacent the gate electrode has been etched and removed. Adjacent the gate electrode (104), an undercutting problem is visible. The etchant in that region has etched not only downward, perpendicularly toward the substrate layer (100), but also in a direction sideways, as illustrated, into the masked portion (118) of the dielectric material between the gate electrode and the substrate, resulting in unsupported and uninsulated undercut regions (110, 112) between the gate electrode (104) and the substrate layer (100), and possible fundamental problems with the illustrative device.
Dry etching using conventional tools such as plasma electrodes provides a significantly more anisotropic etching solution, due to the substantially unidirectional bombardment to which the target material is subjected. One disadvantage of dry etching methods is the possible lack of selectivity of such methods. In other Words, dry etching tools often are fairly effective at etching through not only the target dielectric material, but also through portions of the substrate below. Depending upon the materials at issue, it may be difficult to completely dry etch a target thin film material without damaging the substrate below. Referring to FIGS. 2A–2C, a dry etching scenario is illustrated, as applied to a similar microelectronic structure wherein the masking structure (101) comprises a gate electrode (104) and a mask (106), and wherein the thin film (103) is a dielectric layer (102). FIG. 2A depicts a structure similar to that shown in FIG. 1A.
FIG. 2B depicts the structure of FIG. 2A after a partially-complete dry etch to remove portions of the dielectric material. As shown in FIG. 2B, the anisotropicity of dry etching facilitates what is referred to as relatively straight “sidewalls” (114, 116). The lack of selectivity of the dry etching in the depicted example, however, results in undesirable overetch or erosion (120) of the substrate layer (100), as illustrated in FIG. 2C.
Given the shortcomings of conventional techniques, there is a need for a method to accurately and efficiently remove thin film material from a substrate in the region of a masking structure, such as a gate, without undercutting or undesirable substrate erosion.